Signal integrity is a prominent field of research and development as electronics continue to operate at higher frequencies and processors continue to operate at higher speeds. Conventional signaling circuits on an integrated circuit limit the signal integrity at relatively high frequencies. Normally, the signal integrity decreases as the operating frequency increases because of transmission line reflections and phase changes. These signaling phenomena often result from electrical energy that is shunted by an effective input impedance of the signaling circuit. Thus, the voltage generated across the effective input impedance is a limiting factor for the operating frequency of a computer or another electronic system.
FIG. 1 illustrates a conventional signaling circuit including an input amplifier. The input amplifier is also referred to as a buffer or a receiver. The conventional signaling circuit includes a voltage receiving input buffer which receives a voltage signal via a transmission line coupled to an input pin. A shunt resistance is coupled between the input pin, or bond pad, or input pad, and ground. A termination resistor for transmission line matching is one example of a shunt resistance. Although the shunt resistance can be coupled within the conventional signaling circuit in different ways, the shunt resistance appears in parallel with the input pad capacitance.
This configuration in which the shunt resistance appears in parallel with the effective input capacitance causes a signal voltage swing to be applied across the effective input capacitance. At very high frequencies, the impedance of this capacitance reduces significantly, effectively shunting a large part of the signal current through it. A smaller portion of the signal current generates a voltage across the shunt resistance. Shunting the signal current through the effective input capacitance can cause attenuation and phase shift in the received signal, as well as reflections on the board trace (i.e., transmission line). This implies that, even if it were possible to launch a “perfect” signal at a very high frequency at the transmitter end of a transmission line, the signal is not actually received at the input amplifier if the parasitic pin capacitance of the input pad dominates at the transmission frequency and above.
Note that the reference here to a signal of high frequency should not be understood to exclude signals of lower frequency than the exemplary “high” frequency, where the term “frequency” refers more specifically to the fundamental, or “clock” frequency of, for example, a clock signal or the carrier frequency of a radio frequency (RF) signal, and the signal itself contains higher frequencies than the fundamental frequency. Significant distortion may already occur even if the clock frequency is lower than the frequency at which the capacitance begins to dominate. Such distortion may degrade the signal integrity of the received clock signal to such an extent that it may impact system performance beyond acceptable levels.
The input impedance characteristic of one example of a conventional signaling circuit is shown in FIG. 2. The input impedance characteristic degrades substantially as the frequency of the signal approaches about 3.0 GHz. Although the input impedance characteristic appears to improve above about 3.0 GHz, this is due to series package parasitic inductance (not shown in FIG. 1) which “masks” the effect of the capacitive impedance. In other words, the parasitic inductance becomes significant to the extent of obscuring the parasitic capacitance, creating the appearance of restored input impedance, but the signal integrity of the retrieved signal does not actually improve. Instead, the retrieved signal is attenuated even further.